I realized that there are quite a few of the new additions to VHDL-2008 that hasn't been implemented yet. I have a hard time working with the files in the UVVM Github repository that has extensive use of context, shared variables, external names, etc. For example this file https://github.com/UVVM/UVVM/blob/master/bitvis_vip_scoreboard/tb/sb_uart_sbi_demo_tb.vhd
Do you have plans to implement context? It shouldn't be too complicated if it's just collections of library includes and it would help a lot with analyzing the files since a lot of libraries will not be included otherwise.